The receiver front end signal level detect circuit indicates when input signal level has fallen below user adjustable threshold. The threshold is set with single external resistor. The signal level detect circuit 3 dB optical hysteresis prevents chatter at the signal level detect output.
The PLL has a factory trimmed VCO center frequency and frequency acquisition control loop that combine to guarantee frequency acquisition without false lock. This eliminates reliance on external components such as crystal or SAW filter, to aid frequency acquisition.