Signal applied at VSET pin of 0.2V to 2.5V with respect to COMM is amplified by fixed gain of 30 to produce the 6V to 75V bias at pin VAPD. The accuracy of the ADL5317's bias control interface allows for straightforward calibration to maintain constant avalanche multiplication factor of the photodiode over temperature. The current monitor output, IPDM, maintains its high linearity versus photodiode current over the full range of APD bias voltage. The current ratio of 5:1 remains constant as VSET and VPHV are varied.
The ADL5317 is built for exceptional performance and low noise design for all APD modules and systems in next generation optical networks.