Each DAC has a separate reference input that can be configured as buffered or unbuffered. The outputs of all DACs can be updated simultaneously using the asynchronous LDAC input. The parts incorporate a power-on reset circuit that ensures the DAC outputs power up to 0V and remain there until a valid write to the device takes place. The software clear function clears all DACs to 0V. The parts contain a power-down feature that reduces the current consumption of the device to 300nA at 5V (90nA at 3V).