The input current IPD of 100nA to 100uA applied to the INPT pin is the collector current of an optimally-scaled NPN transistor, which converts this current to voltage (its VBE) with a precise logarithmic relationship. A second such converter is used to handle the reference current, IREF, applied to pin IREF. These input nodes are biased slightly above ground (0.5 V). This is generally acceptable for photodiode applications where the anode does not need to be grounded. Similarly, this bias voltage is easily accounted for in generating IREF. The output of the logarithmic front-end is available at pin VLOG.